Individual net clearances.
Bug #701608 reported by
Bert Timmerman
This bug affects 3 people
| Affects | Status | Importance | Assigned to | Milestone | |
|---|---|---|---|---|---|
| pcb |
New
|
Wishlist
|
Unassigned | ||
Bug Description
This bug report supersedes a part of the multiple feature requests in bug report #699559 "Wishlist".
This is a more advanced feature. Clearances should be
specifiable on a net-by-net basis, overriding global
settings. This is useful for mixed technology and voltage
designs.
A lot of 'professional' software overlooks this. On more
than one occasion I have been faced with a design with
high voltage nets requiring clearances (and creepages!)
of several millimetres, on the same board as surface
mount devices with pin pitches of 0.5mm. The package
used did not support this feature, and it took several full
working days to check the board clearances !
| tags: | added: core drc |
| tags: | added: buil |
| tags: | removed: buil |
| Changed in geda-project: | |
| importance: | Undecided → Wishlist |
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