Allow thermal reliefs for via/zone connections

[nobody]

I have a problem with "Add zones" function. Problem is: When i add zone GND all track and vias on the tracks have a good antipad size and thermal relife. But i have zones GND on the top and on the bottom side and i want to compensate potentianl on the bord. I do it throught vias. I trace the GND track to the vias ( see include file) I dont have thrmal relief. Exclude pads in this case also don`t work.
I highlight the GND net. and display Zones option. Mayby i have bad/incorect settings

[nobody (nobody-users)]

The file Fill Zones Option and little bord.JPG was added: None

[sebc26 (sebc26)]

Hi ...

I have a problem that looks like the same :

http://sourceforge.net/tracker/?func=detail&aid=2980541&group_id=145591&atid=762477

I hope this will be solved soon.

[Robert (birmingham-spider)]

Why would you want thermal relief on vias?

[Lorenzo Marcantonio (l-marcantonio)]

On Thu, 21 Oct 2010, Robert wrote:

> Why would you want thermal relief on vias?

I agree. Vias don't need thermals since they don't have a solder joint!
In fact, more often than not, they aren't even solder accessible (tented
vias, it's an option in the plot dialog), because there is solder mask
covering them.

Thermal relief is used to facilitate soldering/reworking for wave or
hand soldered component. Without them a solder iron (or the solder
fountain, but it's debateable) couldn't heat properly the joint because
of dissipation from the outer plane; reflow mounted components (and even
pin-in-paste THT ones) in fact don't need thermal reliefs because
they're oven soldered...

There is *one* situation in which you could want reliefs in a via: when
using unplated holes and doing metalization with mechanical rivets, to
be soldered; it's indeed an exceedingly expensive process, only for
hobby work (for prototyping it would be too expensive, too!)

A suitable workaround for this kind of situation would be to define
a 'dummy' component to be used for this kind of vias. An added benefit
would be the list of rivets to use in the BOM...

--
Lorenzo Marcantonio
Logos Srl

[Robert (birmingham-spider)]

Moreover I think for most boards thermally relieved vias would be a disadvantage. They would degrade the EMC performance of power planes, take up more space, and offer reduced thermal coupling from one side of the board to the other (when used as part of a heatsinking technique). IMHO thermally relieved vias could be an option if someone is willing to add the required code, but they should certainly not be the default, even if the zone options are set to "Pad in Zone:Thermal relief". The behaviour described by the OP is certainly not a bug.

[Rick Jenkins (rick-hartmantech)]

I really like the lack of thermal relief on vias. It really helps RF performance.

I would suggest that a useful facility would be to have a checkbox available for *every* pad, allowing the user to select thermal relief or not. This would allow boltholes to be made without a thermal relief, making them mechanicaly stronger. Extra control is always welcome, since, as we see above, different people have different priorities.

[dsiroky (siroky)]

How about homemade double-sided PCBs without plating? Then you need thermal reliefs for vias as well to be able to join the sides by soldering.

[Cedric Boudinet (boudinpg)]

Hello
Is there a plan to fix this issue (as an option or not)?
Maybe I can contribute?

[Jeff Young (jeyjey)]

For some time now you've been able to override individual footprints and pads to control how they connect to zones.

The only thing missing is individual control of vias, which are currently always solid.

@Cedric, we always welcome contributions! Please see http://kicad-pcb.org/contribute/developers/ .

(I'm closing this bug for now. If Cedric (or anyone else) wants to fix it, then please set it back to "New".)

[Seth Hillbrand (sethh)]

Hi Jeff- I'm looking at pad stacks for v6. This would fall under that development

[Maciej Suminski (orsonmmz)]

Seth,

Pad stacks are likely related to the PCB model refactor to take advantage of the geometry library. Please let us know in advance if you plan to work on the task, so we can coordinate our actions.

[Seth Hillbrand (sethh)]

Absolutely.

[KiCad Janitor (kicad-janitor)]

KiCad bug tracker has moved to Gitlab. This report is now available here: https://gitlab.com/kicad/code/kicad/-/issues/1949