QEMU fails to boot DR DOS Plus since 0.6.1

Bug #588748 reported by Roy Tam
6
This bug affects 1 person
Affects Status Importance Assigned to Milestone
QEMU
Fix Released
Undecided
Paolo Bonzini

Bug Description

The commit in r1049 (serial interrupt fix (Hampa Hug)) prevents booting Digital Research DOS Plus.

Revision history for this message
Roy Tam (roytam) wrote :
Revision history for this message
Anthony Liguori (anthony-codemonkey) wrote :

This patch doesn't seem correct as the spec is pretty clear that THRE interrupt enable is set to high, then an interrupt is rased if LSR.THRE=1. Does the following also make DOSPlus boot again:

diff --git a/hw/serial.c b/hw/serial.c
index 9102edb..b0ac52f 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -401,7 +401,8 @@ static void serial_ioport_write(void *opaque, uint32_t addr,
                      s->poll_msl = 0;
                 }
             }
- if (s->lsr & UART_LSR_THRE) {
+ if (s->ier & UART_IER_THRI &&
+ s->lsr & UART_LSR_THRE) {
                 s->thr_ipending = 1;
                 serial_update_irq(s);
             }

Changed in qemu:
status: New → In Progress
Revision history for this message
Roy Tam (roytam) wrote :

> This patch doesn't seem correct as the spec is pretty clear that THRE interrupt enable is set to high, then an interrupt is rased if LSR.THRE=1. Does the following also make DOSPlus boot again:

No it doesn't. Same as unpatched.

Revision history for this message
Anthony Liguori (anthony-codemonkey) wrote :

Can you add some debugging to see what IER is being set to?

Do you have any insight into why DR DOS Plus is failing?

Revision history for this message
Roy Tam (roytam) wrote :

> Can you add some debugging to see what IER is being set to?

With DEBUG_SERIAL defined, serial logs:
serial: event 2
serial: write addr=0x01 val=0x02
serial: read addr=0x01 val=0x02
serial: read addr=0x02 val=0x02
serial: write addr=0x01 val=0x00
serial: write addr=0x03 val=0x80
serial: write addr=0x00 val=0x0c
serial: write addr=0x01 val=0x00
serial: write addr=0x03 val=0x03
serial: write addr=0x04 val=0x0b
serial: read addr=0x05 val=0x60
serial: read addr=0x06 val=0xb0
serial: read addr=0x00 val=0x00
serial: write addr=0x01 val=0x0f
serial: read addr=0x02 val=0x02
serial: read addr=0x02 val=0x01
(stalls here)

Revision history for this message
Paolo Bonzini (bonzini) wrote :

I think the interrupt should be raised only on the rising edge of THRE.

Changed in qemu:
assignee: nobody → Paolo Bonzini (bonzini)
Revision history for this message
Thomas Huth (th-huth) wrote :

Has this bug been fixed by this commit here:
http://git.qemu.org/?p=qemu.git;a=commitdiff;h=1645b8eee558ffe2389
?
If so, I think we could now close this bug ticket...

Paolo Bonzini (bonzini)
Changed in qemu:
status: In Progress → Fix Released
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