spi: spi-cadence-quadspi: Fix ospi resume failures conflicts
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
linux-xilinx-zynqmp (Ubuntu) |
Invalid
|
Undecided
|
Unassigned | ||
Jammy |
Invalid
|
Undecided
|
Unassigned |
Bug Description
jammy:xilinx-zynqmp is carrying a patch subject "spi: spi-cadence-
We have found where Xlinx resolved the merge on the XIlinx 6.1 branch but it doesn't seem correct. In the original commit:
(https:/
in the function cqspi_resume() , the call to cqspi_controlle
cqspi_resume() (https:/
This bug is to track how this merge conflict is resolved.
Changed in linux-xilinx-zynqmp (Ubuntu Jammy): | |
status: | New → Invalid |
Changed in linux-xilinx-zynqmp (Ubuntu): | |
status: | New → Invalid |
The conflict resolved in 2023.1_update branch is basically merging xilinx and upstream resume implementation. In cqspi_resume() I see that below code sequence[1] is called twice which can be optimized but is functionally working as reported by the internal regression team.
[1] r_init( cqspi);
cqspi_controlle
cqspi->current_cs = -1;
cqspi->sclk = 0;
I had also discussed this merge conflict with the driver owner and he confirmed that the merge commit published to 2023.1_update should functionally work as we are calling _init with the same values so should not have any side effects.
Now there are two choices -
a) Continue to use merge resolution published to the 2023.1_update branch.
b) Use the below optimize fix for cqspi_resume.
static int cqspi_resume(struct device *dev) drvdata( dev); drvdata( dev);
{
struct cqspi_st *cqspi = dev_get_
struct spi_master *master = dev_get_
u32 ret;
clk_prepare_ enable( cqspi-> clk);
cqspi_ wait_idle( cqspi);
cqspi_ controller_ init(cqspi) ;
cqspi- >current_ cs = -1;
cqspi- >extra_ dummy = false;
cqspi- >clk_tuned = false;
cqspi->sclk = 0;
ret = cqspi_setup_ flash(cqspi) ;
dev_err( dev, "failed to setup flash parameters %d\n", ret);
return ret;
if (ret) {
}
ret = zynqmp_ pm_ospi_ mux_select( cqspi-> pd_dev_ id,
PM_ OSPI_MUX_ SEL_LINEAR) ;
return ret;
if (ret)
/* Set the direction as output and enable the output */
gpio_direction _output( cqspi-> gpio, 1);
udelay(1);
/* Set value 0 to pin */
gpio_set_ value(cqspi- >gpio, 0);
udelay(10);
/* Set value 1 to pin */
gpio_set_ value(cqspi- >gpio, 1);
udelay(35);
return spi_master_ resume( master) ;
}