aarch64 BICS instruciton doesn't set flags
Bug #1889288 reported by
Robert
This bug affects 1 person
| Affects | Status | Importance | Assigned to | Milestone | |
|---|---|---|---|---|---|
| QEMU |
Invalid
|
Undecided
|
Unassigned | ||
Bug Description
When reading the source for translate-a64.c here:
I noticed that it does not appear to call gen_logic_CC for the BICS instruction so is not setting the flags as required. I haven't tried to produce a test case for it but it seems like it might be a bug.
Revision history for this message
| Peter Maydell (pmaydell) wrote | #1 |
| Changed in qemu: | |
| status: | New → Invalid |
Revision history for this message
| Robert (ubuntu-10-rmn30) wrote | #2 |
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The code is correct (though it is admittedly not entirely obvious at first glance). The switch statement at line 4753 is on "(opc | (invert << 2))" (where opc is a 2 bit field and invert a 1 bit field). Both ANDS and BICS have opc==3 and so will cause a call to gen_logic_CC(). The difference between the two insns is that ANDC has invert==0 and BICS has invert==1.