PCBnew: Support for back drilling

[Victor W]

I was wondering what the likelyhood would be for PCBnew supporting back drilling.

We currently have a very complex design, with 28 layers, and 25GHz signal traces.

After simulating the gerbers, with our stack up, and considering the overall propagation path (over two impact connectors and a back plane), we've realized that it's we're going to need back drilling to meet our target eye requirements (for a JESD204B PHY link).

This is not so simple, as the break out density means that we need to spread this out over around 6 layers. This means that we're going to be looking at back drilling to around 4-6 different depths.

Is there a way that we can easily use kicad to generate gerbers to support identifying those vias that require back drilling to different depths?

[Seth Hillbrand (sethh)]

We can add this as a wishlist item for future development.

In Gerber(standard), I believe we would need to create a separate file for back-drilled vias. Gerber X2 and IPC-2581 should allow this natively.

For your current purposes, I would recommend picking a slightly different hole size for your back-drilled vias. Obviously, you will need to have unique sizes for each drill side and depth that you need back drilling for. Then, you can let your board house know the special instructions for that drill size. Alternatively, you can filter the drill size manually from the drill file into separate files that you would call out as Backdrill_Front_1-3.drl (for example)

[SFEN (sfen)]

For better reference, please find attached a gerber output, generated from another program, for a signal integrity reference board. This is the level of detail we would need.

[Nick Østergaard (nickoe)]

Looking at the cross-section in the gerber you attached. Does that mean that there is a thin throughhole drill for all of them and a wider drill that only penetrates a couple of layers from the bottom?

[Victor W (vicw)]

Yes, that's correct. That's also the issue we're having right now, in terms of specifying different clearances, and clearly communicating that with the board house. It's also making layout a bit challenging.

[SFEN (sfen)]

As it happens, we also can't deliberately add NPTH vias to the design.

The challenge with back drilling is that we want to ensure that we can use kicad to do electrical checks, and also only end up with 2 drill files - one for the 'regular' via that is supposed to be there, and another one for the back drilled via.

The issue is that we also want to make sure that this works electrically; if we incorrectly specify the back drill to go too deep, then the resulting PCB isn't worth very much.

Neither situation is easily addressed by Kicad right now.

[KiCad Janitor (kicad-janitor)]

KiCad bug tracker has moved to Gitlab. This report is now available here: https://gitlab.com/kicad/code/kicad/-/issues/2496