Zone fill can create DRC errors
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
KiCad |
Fix Released
|
Critical
|
jean-pierre charras |
Bug Description
When filling with certain combinations of thermal clearance and thermal spoke width, pcbnew can generate zone fills that violate DRC.
The attached board shows a minimal example. In this board, there is a small track below pad 16 that causes two zone areas to appear on both sides. The zone areas overlap tracks and cause DRC errors.
Removing the track stub and/or modifying the zone parameters sufficiently will cause the bad fill to correct itself.
Application: pcbnew
Version: (5.1.0-
Libraries:
wxWidgets 3.0.4
libcurl/7.64.0 OpenSSL/1.1.1a zlib/1.2.11 libidn2/2.0.5 libpsl/0.20.2 (+libidn2/2.0.5) libssh2/1.8.0 nghttp2/1.36.0 librtmp/2.3
Platform: Linux 4.19.0-2-amd64 x86_64, 64 bit, Little endian, wxGTK
Build Info:
wxWidgets: 3.0.4 (wchar_t,wx containers,
Boost: 1.67.0
OpenCASCADE Community Edition: 6.9.1
Curl: 7.64.0
Compiler: Clang 7.0.1 with C++ ABI 1002
Build settings:
USE_
USE_
KICAD_
KICAD_
KICAD_
KICAD_
KICAD_
KICAD_
BUILD_
KICAD_
KICAD_
KICAD_SPICE=ON
Changed in kicad: | |
status: | Fix Committed → Fix Released |
Also, thanks to Frank for finding the initial error and supplying an example board on which to test it.