Page sizes are not interpreted correctly for E500/E500MC

[WGH]

http://cache.freescale.com/files/32bit/doc/ref_manual/E500CORERM.pdf - see 2.12.5.2 MAS Register 1 (MAS1), p. 2-41
http://cache.freescale.com/files/32bit/doc/ref_manual/E500MCRM.pdf - see 2.16.6.2 MAS Register 1 (MAS1), p. 2-54

According to these documents, variable page size for TLB1 is computed as 4K ** TSIZE.

However, QEMU always treats it as if it was 1K << TSIZE, even if options like "-cpu e500mc" are supplied to qemu.

[Scott Wood (scott-buserror)]

This is not a bug. MMU v2 (implemented in e6500) extended the TSIZE field so that 1K <<
TSIZE is correct. The extension was on the LSB side so that it works
fine as long as the low bit of the new TSIZE (which is reserved on
e500v2/mc) is zero.

[WGH (wgh)]

You're absolutely right. Sorry for bothering.