Solder-mask gaps should also apply to silk layer

[RichardNeill]

Consider the following:

1. Create some pads for a custom component.
2. Mark these pads as exposed (so that they are not coated with solder resist).
3. Draw a line, or some text in the silk layer, that partly intersects that pad.

Currently. the silk layer will be drawn perfectly, and the resulting pad can be rather hard to solder!

Proposal: where there is a gap in the solder-mask, silk should automatically be erased.

This will prevent accidental unsolderable pads, and will also cure the effects of bugs #698965, and #699116.

I know it's a heuristic rather than a proper rule, but I think it's a good way to fix the problem.

Thanks for your time.

[DJ Delorie (djdelorie)]

This comes up occasionally, and our usual argument is that the fabs all do different things, and the users all have different needs, so we avoid adding arbitrary "rules" that just work around good design practices. Best practice is to not put silk across pins/pads in footprints, and not expect fabs to erase it for you when you do (although some will, without warning).

Silk over exposed pads is sometimes used to make wierd custom things, too. Who knows what the user will need...

Plus, doing the removal in a way that's compatible with all the fabs is not easy.

[RichardNeill (ubuntu-richardneill)]

Thanks for your explanation. I see why this isn't necessarily a one-size-fits-all solution.
Might I suggest then:

1. Give the user the option when exporting to obliterate the offending silk.

2. Add a warning to the Design-Rule checker.

I agree that best practice is not to do this, but I have done it several times by accident, and failed to spot it. In my case, it's usually very small text labels (eg the "+" for a capacitor).

(One of the things that would make this easier to not do is a previous wish I filed, namely that when the grid is at a pitch of X for pins/pads/tracks (say 0.5mil), and the user is placing text, the grid should temporarily become X/4 (eg 0.125mil). )