ARM instruction "srs" wrong behaviour
Bug #1079080 reported by
vcesson
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
QEMU |
Fix Released
|
Undecided
|
Unassigned |
Bug Description
Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R :
"Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode"
Problem:
When executing this instruction, the register stored is CPSR instead of SPSR.
Context:
Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line:
qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/
Changed in qemu: | |
status: | Confirmed → Fix Committed |
Changed in qemu: | |
status: | Fix Committed → Fix Released |
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It looks like this is only a problem in Thumb mode; the equivalent bug in ARM mode was fixed in commit c67b6b71 back in 2009.
Can you make the test case dtb and image available? That would help in testing...