diff --git a/Makefile b/Makefile index bdc0abd..bfaf34f 100644 --- a/Makefile +++ b/Makefile @@ -14,12 +14,14 @@ RELVERS = `pwd | sed "s-.*/--" | sed "s/vgabios//" | sed "s/-//"` VGABIOS_DATE = "-DVGABIOS_DATE=\"$(RELDATE)\"" -all: bios cirrus-bios +all: bios cirrus-bios lowres-bios bios: vgabios.bin vgabios.debug.bin cirrus-bios: vgabios-cirrus.bin vgabios-cirrus.debug.bin +lowres-bios: vgabios-lowres.bin vgabios-lowres.debug.bin + clean: /bin/rm -f biossums vbetables-gen vbetables.h *.o *.s *.ld86 \ temp.awk.* vgabios*.orig _vgabios_* _vgabios-debug_* core vgabios*.bin vgabios*.txt $(RELEASE).bin *.bak @@ -35,18 +37,24 @@ vgabios.bin : VGAFLAGS := -DVBE -DPCIBIOS vgabios.debug.bin : VGAFLAGS := -DVBE -DPCIBIOS -DDEBUG vgabios-cirrus.bin : VGAFLAGS := -DCIRRUS -DPCIBIOS vgabios-cirrus.debug.bin : VGAFLAGS := -DCIRRUS -DPCIBIOS -DCIRRUS_DEBUG +vgabios-lowres.bin : VGAFLAGS := -DVBE -DPCIBIOS -DLOWRES +vgabios-lowres.debug.bin : VGAFLAGS := -DVBE -DPCIBIOS -DLOWRES -DDEBUG # dist names vgabios.bin : DISTNAME := VGABIOS-lgpl-latest.bin vgabios.debug.bin : DISTNAME := VGABIOS-lgpl-latest.debug.bin vgabios-cirrus.bin : DISTNAME := VGABIOS-lgpl-latest.cirrus.bin vgabios-cirrus.debug.bin : DISTNAME := VGABIOS-lgpl-latest.cirrus.debug.bin +vgabios-lowres.bin : DISTNAME := VGABIOS-lgpl-latest.lowres.bin +vgabios-lowres.debug.bin : DISTNAME := VGABIOS-lgpl-latest.lowres.debug.bin # dependencies vgabios.bin : $(VGA_FILES) $(VBE_FILES) biossums vgabios.debug.bin : $(VGA_FILES) $(VBE_FILES) biossums vgabios-cirrus.bin : $(VGA_FILES) clext.c biossums vgabios-cirrus.debug.bin : $(VGA_FILES) clext.c biossums +vgabios-lowres.bin : $(VGA_FILES) $(VBE_FILES) biossums +vgabios-lowres.debug.bin : $(VGA_FILES) $(VBE_FILES) biossums # build rule %.bin: diff --git a/vbe.c b/vbe.c index 5636758..a5242d1 100644 --- a/vbe.c +++ b/vbe.c @@ -1,6 +1,7 @@ // ============================================================================================ // // Copyright (C) 2002 Jeroen Janssen +// Copyright (C) 2012 Hiroshi Miura // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public @@ -1459,3 +1460,198 @@ _fail: mov ax, #0x014f ret ASM_END + +/* Virtual monitor EDID information */ +ASM_START +vesa_EDID: + db 0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00 + /* 0x0000 8-byte header */ + db 0x04,0x21 /* 0x0008 Vendor ID ("AAA") */ + db 0xAB,0xCD /* 0x000A Product ID */ + db 0x00,0x00,0x00,0x00 /* 0x000C Serial number (none) */ + db 54, 10 /* 0x0010 Week of manufactur (54) and year of manufacture (2000) */ + db 0x01, 0x03 /* 0x0012 EDID version number (1.3) */ + db 0x0F /* 0x0014 Video signal interface (analogue, 0.700 : 0.300 : 1.000 V p-p, + Video Setup: Blank Level = Black Level, Separate Sync H & V Signals are + supported, Composite Sync Signal on Horizontal is supported, Composite + Sync Signal on Green Video is supported, Serration on the Vertical Sync + is supported) */ + db 0x21,0x19 /* 0x0015 Scren size (330 mm * 250 mm) */ + db 0x78 /* 0x0017 Display gamma (2.2) */ + db 0x0F /* 0x0018 Feature flags (no DMPS states, RGB, display is continuous frequency) */ + db 0x78,0xF5 /* 0x0019 Least significant bits for chromaticity and default white point */ + db 0xA6,0x55,0x48,0x9B,0x26,0x12,0x50,0x54 + /* 0x001B Most significant bits for chromaticity and default white point */ + + db 0xFF /* 0x0023 Established timings 1 (720 x 400 @ 70Hz, 720 x 400 @ 88Hz, + 640 x 480 @ 60Hz, 640 x 480 @ 67Hz, 640 x 480 @ 72Hz, 640 x 480 @ 75Hz, + 800 x 600 @ 56Hz, 800 x 600 @ 60Hz) - historical resolutions */ + db 0xEF /* 0x0024 Established timings 2 (800 x 600 @ 72Hz, 800 x 600 @ 75Hz, 832 x 624 @ 75Hz + not 1024 x 768 @ 87Hz(I), 1024 x 768 @ 60Hz, 1024 x 768 @ 70Hz, + 1024 x 768 @ 75Hz, 1280 x 1024 @ 75Hz) - historical resolutions */ + db 0x80 /* 0x0025 Established timings 2 (1152 x 870 @ 75Hz and no manufacturer timings) */ + + /* Standard timing */ + /* First byte: X resolution, divided by 8, less 31 (256–2288 pixels) */ + /* bit 7-6, X:Y pixel ratio: 00=16:10; 01=4:3; 10=5:4; 11=16:9 */ + /* bit 5-0, Vertical frequency, less 60 (60–123 Hz), nop 01 01 */ +#ifdef LOWRES + db 0x81, 0x9A /* 0x0026 Standard timing #1 (1280 x 1024 @ 70Hz) */ + db 0x61, 0x59 /* 0x0028 Standard timing #2 (1024 x 768 @ 85 Hz) */ + db 0x45, 0x59 /* 0x002A Standard timing #3 (800 x 600 @ 85 Hz) */ + db 0x31, 0x4A /* 0x002C Standard timing #4 (640 x 480 @ 70 Hz) */ + db 0x31, 0x59 /* 0x002E Standard timing #5 (640 x 480 @ 85 Hz) */ + db 0x01, 0x01 /* 0x0030 Standard timing #6 (unused) */ + db 0x01, 0x01 /* 0x0032 Standard timing #7 (unused) */ + db 0x01, 0x01 /* 0x0034 Standard timing #8 (unused) */ + + /* 0x0036 First 18-byte descriptor (1280 x 1024) */ + db 0x30, 0x2a /* Pixel clock = 108000000 Hz */ + db 0x00 /* 0x0038 Horizontal addressable pixels low byte (0x0500 & 0xFF) */ + db 0x98 /* 0x0039 Horizontal blanking low byte (0x0198 & 0xFF) */ + db 0x51 /* 0x003A Horizontal addressable pixels high 4 bits (0x0500 >> 8), and */ + /* Horizontal blanking high 4 bits (0x0198 >> 8) */ + db 0x00 /* 0x003B Vertical addressable pixels low byte (0x0400 & 0xFF) */ + db 0x2A /* 0x003C Vertical blanking low byte (0x002A & 0xFF) */ + db 0x40 /* 0x003D Vertical addressable pixels high 4 bits (0x0400 >> 8), and */ + /* Vertical blanking high 4 bits (0x002A >> 8) */ + db 0x30 /* 0x003E Horizontal front porch in pixels low byte (0x0030 & 0xFF) */ + db 0x70 /* 0x003F Horizontal sync pulse width in pixels low byte (0x0070 & 0xFF) */ + db 0x13 /* 0x0040 Vertical front porch in lines low 4 bits (0x0001 & 0x0F), and */ + /* Vertical sync pulse width in lines low 4 bits (0x0003 & 0x0F) */ + db 0x00 /* 0x0041 Horizontal front porch pixels high 2 bits (0x0030 >> 8), and */ + /* Horizontal sync pulse width in pixels high 2 bits (0x0070 >> 8), and */ + /* Vertical front porch in lines high 2 bits (0x0001 >> 4), and */ + /* Vertical sync pulse width in lines high 2 bits (0x0003 >> 4) */ + db 0x2C /* 0x0042 Horizontal addressable video image size in mm low 8 bits (0x012C & 0xFF) */ + db 0xE1 /* 0x0043 Vertical addressable video image size in mm low 8 bits (0x00E1 & 0xFF) */ + db 0x10 /* 0x0044 Horizontal addressable video image size in mm low 8 bits (0x012C >> 8), and */ + /* Vertical addressable video image size in mm low 8 bits (0x00E1 >> 8) */ + db 0x00 /* 0x0045 Left and right border size in pixels (0x00) */ + db 0x00 /* 0x0046 Top and bottom border size in lines (0x00) */ + db 0x1E /* 0x0047 Flags (non-interlaced, no stereo, analog composite sync, sync on */ + /* all three (RGB) video signals) */ +#else + + db 0xD1, 0xC0 /* 0x0026 Standard timing #1 (1920 x 1080 @ 60 Hz) */ + db 0xA9, 0xC0 /* 0x0030 Standard timing #2 (1600 x 900 @ 60 Hz) */ + db 0xA9, 0x40 /* 0x0034 Standard timing #3 (1600 x 1200 @ 60 Hz) */ + db 0x61, 0x59 /* 0x0028 Standard timing #4 (1024 x 768 @ 85 Hz) */ + db 0x45, 0x59 /* 0x002A Standard timing #5 (800 x 600 @ 85 Hz) */ + db 0x81, 0xCA /* 0x002C Standard timing #6 (1280 x 720 @ 70 Hz) */ + db 0x81, 0x0A /* 0x002E Standard timing #7 (1280 x 800 @ 70 Hz) */ + db 0x01, 0x01 /* 0x0032 Standard timing #8 (unused) */ + + /* 0x0036 First 18-byte descriptor (1920 x 1080) */ + db 0x02, 0x3A /* Pixel clock = 148500000 Hz */ + db 0x80 /* 0x0038 Horizontal addressable pixels low byte (0x0780 & 0xFF) */ + db 0x90 /* 0x0039 Horizontal blanking low byte (0x0290 & 0xFF) */ + db 0x72 /* 0x003A Horizontal addressable pixels high 4 bits ((0x0780 & 0x0F00) >> 4), and */ + /* Horizontal blanking high 4 bits ((0x0290 & 0x0F00 ) >> 8) as low bits */ + db 0x38 /* 0x003B Vertical addressable pixels low byte (0x0438 & 0xFF) */ + db 0x26 /* 0x003C Vertical blanking low byte (0x0026 & 0xFF) */ + db 0x40 /* 0x003D Vertical addressable pixels high 4 bits ((0x0438 & 0x0F00) >> 4), and */ + /* Vertical blanking high 4 bits ((0x0026 & x0F00) >> 8) */ + db 0x78 /* 0x003E Horizontal front porch in pixels low byte (0x0078 & 0xFF) */ + db 0xD0 /* 0x003F Horizontal sync pulse width in pixels low byte (0x00D0 & 0xFF) */ + db 0x13 /* 0x0040 Vertical front porch in lines low 4 bits ((0x0001 & 0x0F) << 4), and */ + /* Vertical sync pulse width in lines low 4 bits (0x0003 & 0x0F) */ + db 0x00 /* 0x0041 Horizontal front porch pixels high 2 bits (0x0078 >> 8), and */ + /* Horizontal sync pulse width in pixels high 2 bits (0x00D0 >> 8), and */ + /* Vertical front porch in lines high 2 bits (0x0001 >> 4), and */ + /* Vertical sync pulse width in lines high 2 bits (0x0003 >> 4) */ + db 0x14 /* 0x0042 Horizontal addressable video image size in mm low 8 bits (0x0214 & 0xFF) */ + db 0x2B /* 0x0043 Vertical addressable video image size in mm low 8 bits (0x012B & 0xFF) */ + db 0x21 /* 0x0044 Horizontal addressable video image size in mm high 8 bits (0x0214 >> 8), and */ + /* Vertical addressable video image size in mm high 8 bits (0x012B >> 8) */ + db 0x00 /* 0x0045 Left and right border size in pixels (0x00) */ + db 0x00 /* 0x0046 Top and bottom border size in lines (0x00) */ + db 0x1E /* 0x0047 Flags (non-interlaced, no stereo, analog composite sync, sync on */ + /* all three (RGB) video signals) */ + +#endif + + db 0x00,0x00,0x00,0xfD,0x00 /* 0x0048 Second 18-byte descriptor - display range */ + db 50,150 /* Vertical 50Hz - 150Hz */ + db 31,135 /* Horiz 24kHz - 135kHz */ + db 15 /* clock 150MHz */ + db 0 + db 0x0A,0x20,0x20,0x20,0x20 + db 0x20,0x20 + + db 0x00,0x00,0x00,0xFF,0x00 /* 0x005A Third 18-byte descriptor - display product serial number */ + .ascii "0123456789" + db 0x0A,0x20,0x20 + + db 0x00,0x00,0x00,0xFC,0x00 /* 0x006C Fourth 18-byte descriptor - display product name */ + .ascii "Bochs Screen" + db 0x0A + + db 0x00 /* 0x007E Extension block count (none) */ + db 0x00 /* 0x007F Checksum (ignored - recalculated when needed) */ +ASM_END + +/** Function 15h - Display Identification Extensions + * Input: AX = 4F0Ah VBE 2.0 Protected Mode Interface + * BL = 00h Get capabilities + * BL = 01h Read EDID + * CX = Controller unit number + * DX = EDID block number (if BL = 01h) + * ES:DI = Null pointer/reserved (if BL = 00h) + * ES:DI = Pointer to buffer to store EDID block (if BL = 01h) + * + * Output: AX = Status + * BH = Approximate time to get EDID in seconds rounded up (if BL = 00h) + * BL = DDC level supported: (if BL = 00h) + * Bit Meaning if set + * 0 DDC1 supported + * 1 DDC2 supported + * 2 Screen blanked during transfer + * BH = Unchanged (if BL = 01h) + * CX = Unchanged + * ES:DI = Unchanged + */ + + +ASM_START +vbe_biosfn_display_identification_extensions: + cmp bl,#0x01 + jb _get_capabilities + je _read_EDID +_failed: + mov ax, #0x014f + ret + +_get_capabilities: + test cx,cx + jne _failed + mov ax, #0x004f + mov bx, #0x0101 + ret + +_read_EDID: + test cx,cx + jne _failed + test dx,dx + jne _failed + push si + push di + cld + mov cx,#127 + mov si, # vesa_EDID + xor ah,ah +_nextByte: + db 0x2E + lodsb + stosb + sub ah,al + loop _nextByte + mov al,ah + stosb + pop di + pop si + xor cx,cx + mov ax, #0x004f + ret + +ASM_END diff --git a/vbe.h b/vbe.h index 72cb045..6d9f8e4 100644 --- a/vbe.h +++ b/vbe.h @@ -17,6 +17,7 @@ void vbe_biosfn_set_mode(AX, BX, ES, DI); void vbe_biosfn_save_restore_state(AX, CX, DX, ES, BX); void vbe_biosfn_set_get_palette_data(AX); void vbe_biosfn_return_protected_mode_interface(AX); +void vbe_biosfn_display_identification_extensions(AX, BX, CX, DX, ES, DI); // The official VBE Information Block typedef struct VbeInfoBlock diff --git a/vbetables-gen.c b/vbetables-gen.c index b55c2d1..d1ddcbe 100644 --- a/vbetables-gen.c +++ b/vbetables-gen.c @@ -85,6 +85,9 @@ ModeInfo modes[] = { { 1920, 1080, 16 , 0x190}, { 1920, 1080, 24 , 0x191}, { 1920, 1080, 32 , 0x192}, +{ 1600, 900, 16 , 0x193}, +{ 1600, 900, 24 , 0x194}, +{ 1600, 900, 32 , 0x195}, { 0, }, }; diff --git a/vgabios.c b/vgabios.c index 48c10f2..93c3ed8 100644 --- a/vgabios.c +++ b/vgabios.c @@ -389,9 +389,14 @@ int10_test_vbe_08: jmp int10_end int10_test_vbe_0A: cmp al, #0x0A - jne int10_normal + jne int10_test_vbe_15 call vbe_biosfn_return_protected_mode_interface jmp int10_end +int10_test_vbe_15: + cmp al, #0x15 + jne int10_normal + call vbe_biosfn_display_identification_extensions + jmp int10_end #endif int10_normal: