TSC_DEADLINE incorrectly disabled inside virtual guests
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
linux (Ubuntu) |
Fix Released
|
Medium
|
Dan Streetman | ||
Artful |
Fix Released
|
Medium
|
Dan Streetman | ||
Bionic |
Fix Released
|
Medium
|
Dan Streetman |
Bug Description
An upstream commit added Intel cpu model/microcode checks to disable TSC_DEADLINE due to cpu errata:
commit bd9240a18edfbfa
Author: Peter Zijlstra <email address hidden>
Date: Wed May 31 17:52:03 2017 +0200
x86/apic: Add TSC_DEADLINE quirk due to errata
That commit is included in the Ubuntu kernels starting at artful v4.13.
However, most hypervisors virtualize TSC deadline timer (and therefore it isn't affected by Intel CPU errata inside the guest), and even if any hypervisors directly exposed the hardware TSC deadline timer, the guests cannot update CPU microcode and therefore it's the hypervisor's job to disable/
This upstream commit skips the microcode check to disable the TSC deadline timer if it detects it's running under a hypervisor:
commit cc6afe224029804
Author: Paolo Bonzini <email address hidden>
Date: Tue Oct 10 12:12:57 2017 +0200
x86/apic: Silence "FW_BUG TSC_DEADLINE disabled due to Errata" on hypervisors
Changed in linux (Ubuntu): | |
status: | New → Fix Released |
Changed in linux (Ubuntu Artful): | |
assignee: | nobody → Dan Streetman (ddstreet) |
importance: | Undecided → Medium |
status: | Fix Released → In Progress |
Changed in linux (Ubuntu Artful): | |
status: | In Progress → Fix Committed |
Changed in linux (Ubuntu): | |
status: | In Progress → Fix Released |
This requires two commits, 594a30fb1242471 7a41c62323d2a8b f167dbccad and cc6afe224029804 9585e86b1ade85e fc8a7f225d, which are already upstream and will be included in the 4.14 kernel; so this SRU is required only for artful, as b-series will have the needed patches already.